1. Field of the Invention
This application relates to signal envelope processing, in particular to the rapid and accurate detection of increases in a digital signal envelope.
2. Description of the Related Art
There are a number of different applications in which it desired to monitor the envelope of a digital signal in order to control downstream processing or adjust the settings of downstream circuitry. By envelope is meant an indication of the signal amplitude and/or peak magnitude of the signal waveform represented by the data of the digital signal.
For example in class G amplifier circuits a digital audio signal may be received by an audio amplification circuit where the power supply to at least one amplifier stage is controlled based on the envelope of the signal to be amplified. The power supply voltage is maintained at a level so that there is sufficient headroom for the signal to be amplified but when the input signal level reduces, the supply voltage also reduces when possible so as to reduce the power that has to be supplied to provide a required current in the load and thus increase efficiency.
FIG. 1 shows an example of a Class G audio amplification circuit. A digital audio input signal Din is received at a sample rate fs. This digital input signal may be interpolated by interpolator 101 to an increased sample rate n.fs (e.g. 64.fs) before being converted to an analogue signal by Digital-to-Analogue Converter (DAC) 102. The analogue signal may then be amplified by amplifier 103 and provided to an output say connected to loudspeaker 104. The supply voltage to at least one element of the amplifier output, say at least an output stage of the DAC 102 and/or amplifier 103 may be varied by a variable voltage power supply unit 104. The voltage of the power supply unit may be controlled in response to the envelope of the signal to be amplified so that the supply voltage may be reduced when possible when amplifying lower envelope signals to save power. An envelope detector 105 of some sort must therefore be used to determine the signal envelope.
For increases in signal amplitude resulting in a requirement to increase the supply voltage to an amplifier stage, the supply voltage should be increased before the increased amplitude signal arrives to avoid any issues with signal clipping. The envelope detector therefore typically has a fast attack time constant and monitors the signal at a point upstream of the components to which the power supply may be varied. Typically there may be very little propagation delay between the output of interpolator 101 and the output stage of the DAC 102 or the amplifier 103 thus leaving very little time to detect and act upon any increases in signal envelope. The propagation delay between the interpolator 101 and DAC 102 could be increased by using specific delay elements in the signal path but such delay elements will increase the size and cost of the amplifier circuit and are generally avoided. Thus the envelope detector may monitor the envelope of the input digital signal prior to interpolation. Using the input signal prior to interpolation may however result in an underestimation of the actual signal envelope as illustrated in FIG. 2.
FIG. 2 illustrates an input signal which in this example is a sinusoidal input at a frequency of fs/4. For typical audio sample rates, e.g. 48 kHz or 44.1 kHz, this would correspond to a sinusoidal input at around 10 kHz. As the input signal has a frequency of fs/4 there will be four samples per cycle. FIG. 2 illustrates the difference in maximum sample value where the samples are acquired with no phase lag, i.e. one sample corresponds to the peak signal value, compared to sample acquired with a 45° phase lag. In the latter case the maximum sample value will be −3 dB lower than the actual peak signal value.
Thus using the base sample rate to determine the envelope of an interpolated signal may result in the determined envelope being underestimated.
Envelope detection may also be used in Dynamic Range Enhancement (DRE) which is a technique to improve noise performance at low signal levels. In DRE the magnitude of gain provided by a digital gain element is varied so as to fully utilise the input range of a DAC, as illustrated in FIG. 3. An input digital signal Din may be received at a sample rate fs and interpolated to a sample rate n.fs, say 64fs. In the example of FIG. 3 there is a two-stage interpolation process, a first interpolator 101 a interpolates to an intermediate sample rate m.fs which may, for example be 4fs before a second stage interpolator produces the signal at n.fs. A digital gain GDIG is applied to the signal before it is input to DAC 102. The digital gain applied is adjusted based on the signal level so that the full input range of the DAC 102 is used but not exceeded. For low amplitude signals the digital gain may thus be increased to make more use of the input range of the DAC. The analogue output signal from DAC 102 is amplified by variable gain amplifier 103 and may be supplied to a speaker 104. The analogue gain applied, GANA, compensates for the digital gain and thus the analogue gain variation may be the inverse of the digital gain variation. Thus for a low amplitude input digital signal the analogue gain applied after the DAC is reduced to compensate for the increased digital gain applied prior to the DAC. This has the effect that the overall gain of the signal processing chain remains substantially constant but the low analogue gain reduces the quantisation and thermal noise of the DAC appearing at the output for low amplitude signals. An envelope detector 105 is thus used to determine the envelope of the digital signal which is used by gain allocation unit 301 to control the allocation of digital and analogue gain. In DRE the interpolated signal at n.fs may be input to the envelope detector to ensure that the gain is allocated correctly. However as mentioned above this requires very quick identification of any increase in signal envelope so the digital gain can be lowered appropriately to avoid signal clipping. This also requires the envelope detector to operate at the high sample rate, consuming extra power and chip area.